The Armv7 architecture introduced the optional Advanced SIMD NEON extensions for Armv-7A and Armv7R profiles. SIMD instructions have the potential to provide significant performance improvements in many math-intensive digital signal processing multimedia applications. These processors are referred to as SISD architectures, or Single-Instruction/Single-Data. Other traditional microcomputer architectures included only one arithmetic logic unit that sequentially executed one instruction on one pair of operands at a time. This parallel processing using SIMD is not a new concept and was used back as early as mid-1970s on the Cray-1 supercomputer. The key concept behind SIMD is that many sequential computations can be combined in parallel using specific machine instructions that operate on multiple data paths (registers/memory) simultaneously. SIMD stands for Single-Instruction/Multiple Data. One such feature enhancement is trending towards more data parallelism and vector processing through the use of SIMD computation units. To overcome this issue, semiconductor IP suppliers and chip manufacturers alternatively have sought to implement various micro-architectural enhancements to significantly increase the performance of a processor core, while operating at lower operating speeds with minimal impact in both power consumption and die size. This is due to the non-linear behavior of power to frequency at the faster manufacturing process corners, where higher operating frequencies result in exponential increase in power.
However, due to limited battery life on mobile devices, power consumption has increasingly been recognized as the key factor in limiting the maximum processor operating speed at a given semiconductor manufacturing process. In the never-ending quest for reaching increased performance and low power, semiconductor chip manufacturers continue to push the boundaries of Moore’s Law with the migration to smaller silicon geometries.
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